Processor performance directly depends on the number of transistors. The more semiconductors on one square centimeter, the smarter the chip. To dramatically increase performance, you need to double the number of transistors every year. Technologies already allow the production of particles with a size of 1 nm, however, not every material allows you to work on this scale. For example, silicon in which semiconductors are placed has physical limitations and some solutions simply cannot be made based on this material. Moore’s Law is based on this theory, but Intel is proving that the theory is outdated and that the law is no longer valid.
To fit billions of transistors on a silicon wafer, you need to know the basics of playing Tetris – the parts must fit very tightly, using all the free space. Intel currently uses FinFETs. These are modern 3D transistors with planar placement – that is, side by side. This arrangement limits the annual increase in the number of conductors per square and does not allow a significant jump in performance.
This problem can be solved in several ways – change the substrate material or come up with a new way of placing transistors. The second method is easier to implement, and Intel has already developed a technology that can double the number of transistors per location without significant costs and global hardware upgrades.
First, it is the transition to Intel Nanoribbon transistors with gates that surround the channels on four sides, and not just cover them in the form of “gates”. This method of constructing a semiconductor affects the quality of the transistor, in particular, it allows you to reduce the operating voltage. But a significant plus of Nanoribbon is that now such transistors can be placed one above the other – that is, if the horizontal silicon area has already been used to the maximum, then semiconductors can now be scaled vertically.
Intel believes that the costs of implementing these architectural features will be minimal, and so far the only challenge is to learn how to create multilayer substrates and connect them so that the transistors work synchronously without delays.
Now the development of such technologies is at the level of experiments, however, Samsung and TSMC are also working in this direction, which means that this is a promising direction and has the right to be implemented. Moreover, the Intel representative said that the company plans to see these technologies in practice in the next few years.
A source: hardwareluxx
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