An AMD roadmap has leaked online, describing a number of key features of the company’s future products. It was obtained by the author of the Moore’s Law Is Dead channel.

The document, among other things, describes the Zen 5 and Zen 6 architectures.

The first to hit the market, of course, will be Zen 5, codenamed Nirvana. The first CPUs based on it are expected in the first half of 2024. Processors with Zen 5 architecture will be produced using 3 and 4 nm technical processes and will bring an increase in IPC (the number of instructions executed per clock cycle) by 10-15%. It is also known that the data cache of Zen 5 will be increased to 48 KB, a new low-power core version will appear, and Zen 5 will also bring a 16-core cluster. Probably, only Zen 5c cores will be combined with 16 pieces, but this still means that the total number of cores in the new processors will increase and finally exceed the 16 pieces mark that we have become accustomed to since the Ryzen 3000.

Zen 6, codenamed Morpheus, is expected to move to 3nm and 2nm process technology and will be released sometime in 2025. The IPC indicator will increase by 10%, that is, not as much as in recent years. But the architecture will bring support for FP16 computing to accelerate AI/ML algorithms and a new memory profiler. Moreover, processor clusters will be able to have 32 cores each, which means that we will again see an increase in the number of cores in the CPU as a whole.

Moore’s Law Is Dead profiled many AMD products before they were released. In particular, the Radeon RX 7800 and Radeon RX 7700 video cards several months before the announcement.

Today, AMD FSR 3 technology is coming to the market, which is designed to compete with DLSS 3. The first game to already receive FSR 3 was Forspoken. Patch 1.22 is already available, so anyone with a suitable graphics card can try out the technology.

Let us remind you that FSR 3, like DLSS 3, can complete the drawing of frames. AMD calls it Motion Fluid Frames, and this technology, unlike Nvidia Frame Generation, is not tied to hardware, therefore, like FSR 3 in general, it works on a variety of video cards not only from AMD.

In particular, AMD itself talks about the need to have a Radeon RX 5000 or newer accelerator, GeForce RTX 20 or newer and Intel Arc A7. But at the same time, technically the technology can work on older adapters: all that remains is to wait for the tests.

The release of the GeForce RTX 5090 is still very far away, but gradually more and more information about this video card is appearing. Now, a very reliable insider Kopite7kimi has shared some characteristics of the GB202 GPU, which will form the basis of Nvidia’s new flagship.

Judging by these data, the new GPU will receive 12 TPC blocks of eight SM blocks each. If the number of CUDA cores in one SM block does not change, and no rumors say anything about this, then the GB202 will receive 24,576 CUDA cores. For comparison, it has 18,432 CUDA cores.

At the same time, the RTX 5090 will likely receive GB202 in an incomplete configuration. For example, the RTX 4090 has 16,384 active CUDA cores, which means 16 SM units are disabled, or about 11%. If the situation is approximately the same in the case of the new generation, then the RTX 5090 will receive approximately 170 SM blocks or 21,760 CUDA cores. Of course, these are all very rough estimates.

It is also reported that the GB202 will receive a 512-bit memory bus. Whether the RTX 5090 or only the RTX 5090 Ti will receive it, if one comes out at all, is still anyone’s guess. But in any case, the GPU itself will have a much wider bus than the AD102. And if Nvidia uses GDDR7 memory in the new generation, the throughput of the RTX 5090 compared to the RTX 4090 will increase incredibly.

Insider kopite7kimi was the first to accurately describe the parameters of GeForce RTX 30 cards, and he also described RTX 40 cards more than once. Overall, it is one of the most reliable sources in this segment.